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<!DOCTYPE html>
<html>
<head>
<meta charset="utf-8" />
<meta name="viewport" content="width=device-width, initial-scale=1.0, maximum-scale=1.0, user-scalable=no" />
<link rel="icon" href="assets/sibin.integral.favicon.ico">
<link rel="stylesheet" href="assets/reveal-js/dist/reveal.css" />
<link rel="stylesheet" href="assets/custom.sibin.css" />
<link rel="stylesheet" href="assets/monokai.css" />
</head>
<body>
<div class="reveal">
<div class="slides">
<section data-markdown
data-separator="^\s*---\s*$"
data-separator-vertical="^\s*-v-\s*$"
data-separator-notes="^Notes?:"
data-charset="utf-8"
data-auto-animate="True"
>
<textarea data-template>
# embedded architectures
## **Design of Autonomous Systems**
### csci 6907/4907-Section 86
### Prof. **Sibin Mohan**
---
## what is an "embedded system"?
---
## what is an "embedded system"?
- like autonomy, no _exact_ definition
---
## what is an "embedded system"?
- like autonomy, no _exact_ definition
- systems created for **specific functionality**
---
## what is an "embedded system"?
- like autonomy, no _exact_ definition
- systems created for **specific functionality**
- fixed/operational for **years**, decades even!
---
## tradeoff between
<div class="multicolumn">
<div>
<br>
<br>
**performance** vs
</div>
</div>
---
## tradeoff between
<div class="multicolumn">
<div>
<br>
<br>
**performance** vs
</div>
<div>
<ul>
<li>power/battery life</li>
</ul>
</div>
</div>
---
## tradeoff between
<div class="multicolumn">
<div>
<br>
<br>
**performance** vs
</div>
<div>
<ul>
<li>power/battery life</li>
<li>less memory</li>
</ul>
</div>
</div>
---
## tradeoff between
<div class="multicolumn">
<div>
<br>
<br>
**performance** vs
</div>
<div>
<ul>
<li>power/battery life</li>
<li>less memory</li>
<li>fewer peripherals</li>
</ul>
</div>
</div>
---
## tradeoff between
<div class="multicolumn">
<div>
<br>
<br>
**performance** vs
</div>
<div>
<ul>
<li>power/battery life</li>
<li>less memory</li>
<li>fewer peripherals</li>
<li>limited applications</li>
</ul>
</div>
</div>
---
## tradeoff between
<div class="multicolumn">
<div>
<br>
<br>
**performance** vs
</div>
<div>
<ul>
<li>power/battery life</li>
<li>less memory</li>
<li>fewer peripherals</li>
<li>limited applications</li>
<li>smaller operating systems</li>
<li><em>etc.</em></li>
</ul>
</div>
</div>
---
main reason?
## **predictability**
---
## predictability
**guarantee** the system works,
---
## predictability
**guarantee** the system works,
- correctly
- **safely**
---
## predictability
**guarantee** the system works,
- correctly
- **safely**
essentially → must be easy to **certify** the system
---
## the **wcet** problem
---
## the **wcet** problem
"worst-case execution time"
---
## the **wcet** problem
"worst-case execution time"
> **longest** execution time for a program <br>
---
## the **wcet** problem
"worst-case execution time"
> **longest** execution time for a program <br>
> on a **specific hardware platform**
---
## the **wcet** problem
"worst-case execution time"
> **longest** execution time for a program <br>
> on a **specific hardware platform**
must consider → **all possible inputs**
---
## wcet | used to ensure...
- "_schedulability_"
- resource requirements
- performance limits
of embedded and real-time programs
---
## wcet approaches
lots of approaches to computing the WCET, _e.g.,_
- [dynamic/empirical](https://www.cs.fsu.edu/~whalley/papers/tecs07.pdf) → run program lots of times on the platform
- [static](https://www.cs.fsu.edu/~whalley/papers/tecs07.pdf) → _compile time_ analysis to compute the _worst-case paths_
- [hybrid](https://sibin.github.io/papers/2008_NCSU-Dissertation_CheckerMode_SibinMohan.pdf) → a combination of the two
- [probabilistic](https://people.ac.upc.edu/fcazorla/articles/jabella_ecrts2014_2.pdf) → combine dynamic analysis+statistical methods
- [ML-based methods](https://dl.acm.org/doi/10.1145/3570361.3615740) → applying machine-learning to the problem
---
## so what's the "problem"?
---
## so what's the "problem"?
at a high-level, the execution time distributions of applications:
<img src="./img/embedded_arch/wcet_wilhelm.png" height="550" style="display: inline-block;" title="https://www.inf.ed.ac.uk/teaching/courses/es/PDFs/lecture_11.pdf" />
Note: we see that the various methods either underestimate or overestimate the wcet. the former affects the safety, the latter wastes resources
---
### wcet analysis is a hard problem!
structural problems (in hardware/software) make it more difficult!
---
## consider this example
```c
void main()
{
int max = 10 ;
int sum = 0;
for( int i = 0 ; i < max ; ++i)
sum += i ;
}
```
---
## consider this example
```c
void main()
{
int max = 10 ;
int sum = 0;
for( int i = 0 ; i < max ; ++i)
sum += i ;
}
```
how do you compute the WCET for this code?
---
## need additional information
---
## need additional information
first, define the **processor** it runs on → say, "**P**"
---
## need additional information
first, define the **processor** it runs on → say, "**P**"
- how long each instruction takes to execute on P
---
## need additional information
first, define the **processor** it runs on → say, "**P**"
- how long each instruction takes to execute on P
- how many loop iterations?
---
## need additional information
first, define the **processor** it runs on → say, "**P**"
- how long each instruction takes to execute on P
- how many loop iterations?
- what are the startup/cleanup times for the program on P?
---
### adding in all that information, we have...
```c [1|3|4|5-6|7]
void main() // startup cost = 100 cycles
{
int max = 15 ; // 10 cycles
int sum = 0; // 10 cycles
for( int i = 0 ; i < max ; ++i) // 5 cycles, once
sum += i ; // 20 cycles each iteration
} // cleanup cost = 120 cycles
```
---
### to calculate the wcet
```c
1 void main() // startup cost = 100 cycles
2 {
3 int max = 15 ; // 10 cycles
4 int sum = 0; // 10 cycles
5 for( int i = 0 ; i < max ; ++i) // 5 cycles, once
6 sum += i ; // 20 cycles each iteration
7 } // cleanup cost = 120 cycles
```
$$
wcet = line_1 + line_3 + line_4 + line_5 + (line_6 * max)
$$
---
### to calculate the wcet
```c
1 void main() // startup cost = 100 cycles
2 {
3 int max = 15 ; // 10 cycles
4 int sum = 0; // 10 cycles
5 for( int i = 0 ; i < max ; ++i) // 5 cycles, once
6 sum += i ; // 20 cycles each iteration
7 } // cleanup cost = 120 cycles
```
$$
wcet = line_1 + line_3 + line_4 + line_5 + (line_6 * max)
$$
which is fine for this simple example
---
Now consider this slight change to the above code:
```c [3]
void main( int argc, char* argv[] )
{
int max = atoi( argv[1] ) ; // convert the command line arg to max
int sum = 0;
for( int i = 0 ; i < max ; ++i) // how many iterations?
sum += i ;
}
```
---
Now consider this slight change to the above code:
```c [3]
void main( int argc, char* argv[] )
{
int max = atoi( argv[1] ) ; // convert the command line arg to max
int sum = 0;
for( int i = 0 ; i < max ; ++i) // how many iterations?
sum += i ;
}
```
previous equation **fails**!
---
Now consider this slight change to the above code:
```c [3]
void main( int argc, char* argv[] )
{
int max = atoi( argv[1] ) ; // convert the command line arg to max
int sum = 0;
for( int i = 0 ; i < max ; ++i) // how many iterations?
sum += i ;
}
```
previous equation **fails**!
no longer know the value of `max` → arbitrary wcet!
---
let's make another change to the code:
```c [1-6|10-16]
#define VERY_LARGE_ARRAY+SIZE 1>>18
void main()
{
int first_array[VERY_LARGE_ARRAY_SIZE] ;
int second_array[VERY_LARGE_ARRAY_SIZE] ;
int sum_first = 0;
int sum_second = 0;
for( int i = 0 ; i < VERY_LARGE_ARRAY_SIZE * 2 ; ++i)
{
if( i%2 )
first_sum += first_array[i/2] ;
else
second_sum += second_array[(int)((i/2)+1)] ;
}
}
```
---
let's make another change to the code:
```c [10-16]
#define VERY_LARGE_ARRAY+SIZE 1>>18
void main()
{
int first_array[VERY_LARGE_ARRAY_SIZE] ;
int second_array[VERY_LARGE_ARRAY_SIZE] ;
int sum_first = 0;
int sum_second = 0;
for( int i = 0 ; i < VERY_LARGE_ARRAY_SIZE * 2 ; ++i)
{
if( i%2 )
first_sum += first_array[i/2] ;
else
second_sum += second_array[(int)((i/2)+1)] ;
}
}
```
can we compute wcet easily (using previous equation)?
**note:** maximum size of loop is known → `VERY_LARGE_ARRAY_SIZE * 2`
Note: pause and ask students what, if anything can go wrong?
---
### let's see what happens in each iteration
---
### let's see what happens in each iteration
| iter | operation | cache state | reason |
|--------|----------------------------|-------------------|---------------------------------------------|
| 1 | `first_array` loaded | miss | evicts whatever was previously in cache |
---
### let's see what happens in each iteration
| iter | operation | cache state | reason |
|----------------|----------------------------|-------------------|---------------------------------------------|
| 1 | `first_array` loaded | miss | evicts whatever was previously in cache |
| 2 | `second_array` loaded | miss | **evicts `first_array`** due to lack of space |
---
### let's see what happens in each iteration
| iter | operation | cache state | reason |
|----------------|----------------------------|-------------------|---------------------------------------------|
| 1 | `first_array` loaded | miss | evicts whatever was previously in cache |
| 2 | `second_array` loaded | miss | **evicts `first_array`** due to lack of space |
| 3 | `first_array` loaded again | miss | **evicts `second_array`** due to lack of space |
|...|
||
---
program will _constantly_ suffer cache misses!
---
program will _constantly_ suffer cache misses!
### loop's execution time blows up!
---
### loop's execution time blows up!
```c [11-18]
#define VERY_LARGE_ARRAY+SIZE 1>>18
void main()
{
int first_array[VERY_LARGE_ARRAY_SIZE] ;
int second_array[VERY_LARGE_ARRAY_SIZE] ;
int sum_first = 0;
int sum_second = 0;
for( int i = 0 ; i < VERY_LARGE_ARRAY_SIZE * 2 ; ++i)
{
if( i%2 )
first_sum += first_array[i/2] ;
// 20 cycles + cache miss time (100s of cycles)
else
second_sum += second_array[(int)((i/2)+1)] ;
// 20 cycles + cache miss time (100s of cycles)
}
}
```
---
program will _constantly_ suffer cache misses!
### loop's execution time blows up!
<br>
now we need to model → **cache behavior** for program/data
---
### further complications from
other hardware features, _e.g.,_
- processor pipelining
- prefetching
- branch prediction
- multithreading
- multicore systems
- memory buses
- networks-on-chip
- and too many others to recount here...
---
processor feature → improves performance → *bad for wcet analysis*!
---
processor feature → improves performance → *bad for wcet analysis*!
### embedded/real-time systems prefer **simpler** processors
---
## embedded processors
come in myriad shapes and sizes:
1. Microcontrollers
2. Digital Signal Processors
3. Microprocessors
4. System-on-a-Chip
5. Embedded accelerators
6. ASICs and FPGAs
---
so, we focus on:
<img src="./img/stack_architecture/stack_overview.15.png" height="800">
---
## Microcontrollers
---
## Microcontrollers
from [Wikipedia](https://en.wikipedia.org/wiki/Microcontroller),
> "A microcontroller (MC, UC, or μC) or microcontroller unit (MCU) is a small computer <br>
> on a single integrated circuit."
---
## Microcontrollers
- most common type of "processors" in embedded systems
- **[more than 55%](https://www.embedded.com/the-two-percent-solution/)** of the world's processors!
---
## Microcontrollers
- most common type of "processors" in embedded systems
- **[more than 55%](https://www.embedded.com/the-two-percent-solution/)** of the world's processors!
- **small, yet critical**, systems
---
## Microcontrollers
- most common type of "processors" in embedded systems
- **[more than 55%](https://www.embedded.com/the-two-percent-solution/)** of the world's processors!
- **small, yet critical**, systems
- car engine control
- implantable medical devices
- thermal monitoring
- millions (billions?) of other applications!
---
## microcontroller hardware features
---
## microcontroller hardware features
| component | details |
|-----------|---------|
| one CPU core | typically simple `4` or `8` bit chips |
Note:
Processor bit width refers to the amount of data (in bits) a CPU can process in a single operation, determining its data handling capacity and memory addressing ability, with 32-bit and 64-bit being common standards, where 64-bit CPUs handle larger chunks of data (8 bytes) and access vastly more RAM than 32-bit ones (4 bytes)
---
## microcontroller hardware features
| component | details |
|-----------|---------|
| one CPU core | typically simple `4` or `8` bit chips |
| small pipelined architectures | sometimes `2` or `4` stage pipelines |
---
## microcontroller hardware features
| component | details |
|-----------|---------|
| one CPU core | typically simple `4` or `8` bit chips |
| small pipelined architectures | sometimes `2` or `4` stage pipelines |
| some limited memory | typically a few hundred kilobytes, perhaps in the form of EEPROMs or FLASH |
---
## microcontroller hardware features
| component | details |
|-----------|---------|
| one CPU core | typically simple `4` or `8` bit chips |
| small pipelined architectures | sometimes `2` or `4` stage pipelines |
| some limited memory | typically a few hundred kilobytes, perhaps in the form of EEPROMs or FLASH |
| programmable I/O | to interact with the real world |
---
## microcontroller hardware features [contd.]
| component | details |
|-----------|---------|
| low operating frequencies | e.g., `4 KHz`; simpler/older processors, yet more predictable |
Note:
processor "frequency is the rate at which a CPU executes basic operations, measured in gigahertz (GHz), indicating billions of cycles per second, essentially how many "ticks" the processor makes to process instructions;
---
## microcontroller hardware features [contd.]
| component | details |
|-----------|---------|
| low operating frequencies | e.g., `4 KHz`; simpler/older processors, yet more predictable |
| low power consumption | in the **milliwatts** or **microwatts** ranges; might even be **nanowatts** when the system is _sleeping_ |
---
## microcontroller hardware features [contd.]
| component | details |
|-----------|---------|
| low operating frequencies | e.g., `4 KHz`; simpler/older processors, yet more predictable |
| low power consumption | in the **milliwatts** or **microwatts** ranges; might even be **nanowatts** when the system is _sleeping_ |
| interrupts (some programmable) | often _real-time_ (fixed/low latency) |
Note:
this is the **crux** of how we can implement "real-time" behavior. Low latency/deterministic interrupts
---
## microcontroller hardware features [contd.]
| component | details |
|-----------|---------|
| low operating frequencies | e.g., `4 KHz`; simpler/older processors, yet more predictable |
| low power consumption | in the **milliwatts** or **microwatts** ranges; might even be **nanowatts** when the system is _sleeping_ |
| interrupts (some programmable) | often _real-time_ (fixed/low latency) |
| general-purpose I/O (GPIO) pins | for I/O |
---
## microcontroller hardware features [contd.]
| component | details |
|-----------|---------|
| low operating frequencies | e.g., `4 KHz`; simpler/older processors, yet more predictable |
| low power consumption | in the **milliwatts** or **microwatts** ranges; might even be **nanowatts** when the system is _sleeping_ |
| interrupts (some programmable) | often _real-time_ (fixed/low latency) |
| several general-purpose I/O (GPIO) pins | for I/O |
| timers | e.g., a programmable interval timer (PIT) |
||
---
### **Additional features** found on some microcontrollers:
---
### **Additional features** found on some microcontrollers:
| component | details |
|-----------|---------|
| analog to digital (ADC) convertors | to convert incoming (real-world, sensor) data to a digital form that the uC can operate on |
Note:
- because the real world is "analog"/continuous
---
### **Additional features** found on some microcontrollers:
| component | details |
|-----------|---------|
| analog to digital (ADC) convertors | to convert incoming (real-world, sensor) data to a digital form that the uC can operate on |
| digital-to-analog (DAC) convertor | to do the opposite, convert from digital to analog signals to send outputs in that form |
Note:
- because the real world is "analog"/continuous
---
### **Additional features** found on some microcontrollers:
| component | details |
|-----------|---------|
| analog to digital (ADC) convertors | to convert incoming (real-world, sensor) data to a digital form that the uC can operate on |
| digital-to-analog (DAC) convertor | to do the opposite, convert from digital to analog signals to send outputs in that form |
| universal async tx/rx (UART) | to receive/send data over a _serial_ line |
---
### **Additional features** [contd.]:
| component | details |
|-----------|---------|
| pulse width modulation (PWM) | so that the CPU can control **motors** (significant for us in autonomous/automotive systems), power systems, resistive loads, etc. |
---
### **Additional features** found on some microcontrollers:
| component | details |
|-----------|---------|
| pulse width modulation (PWM) | so that the CPU can control **motors** (significant for us in autonomous/automotive systems), power systems, resistive loads, etc. |
| JTAG interface | debugging interface |
||
---
### Microcontroller programs and data
---
### Microcontroller programs and data
- are small → must fit in (limited) memory
---
### Microcontroller programs and data
- are small → must fit in (limited) memory
- often directly programmed in **assembly**!
---
### Microcontroller programs and data
- are small → must fit in (limited) memory
- often directly programmed in **assembly**!
- assembly code might need _hand tuning_
Note: hand-tuning is for both, performance as well as fitting into the limited memory
---
### Microcontroller programs and data
- are small → must fit in (limited) memory
- often directly programmed in **assembly**!
- assembly code might need _hand tuning_
- **C** is another popular language
---
### Microcontroller programs and data
- are small → must fit in (limited) memory
- often directly programmed in **assembly**!
- assembly code might need _hand tuning_
- **C** is another popular language
- **no operating systems** (or very rare)!
Note:
- "**bare metal execution"
---
### Microcontroller programs and data
- are small → must fit in (limited) memory
- often directly programmed in **assembly**!
- assembly code might need _hand tuning_
- **C** is another popular language
- **no operating systems** (or very rare)!
- sometimes use special-purpose programming languages/instructions
---
### popular microcontroller families:
|||||
|----|----|----|----|
|<center><img src="./img/embedded_arch/ATmega169-MLF.jpg" height="100"><br>Atmel ATmega</center> | <center><img src="./img/embedded_arch/Microchip_PIC24HJ32GP202.jpg" height="100"><br>Microchip Technology</center> | <center><img src="./img/embedded_arch/Motorola_68HC11.jpg" height="100"><br>Motorola (Freescale)<br></center> | <center><img src="./img/embedded_arch/NXP_LPC2387FBD100-5543.jpg" height="100"><br>NXP</center> |
||
---
## digital signal processor (dsp)
---
## what is a dsp?
- specialized microcontrollers optimized for **digital signal processing**
---
## what is a dsp?
- specialized microcontrollers optimized for **digital signal processing**
<img src="./img/embedded_arch/dsp_example.avif" height="500" title="dsp signal example">
---
## what is a dsp?
- specialized microcontrollers optimized for digital signal processing
- widely used in:
- audio processing
- radar and sonar
- speech recognition systems
- image processing
- satellites
- telecommunications
- mobile phones
- televisions
---
## main goals of dsp
- **isolate**, **measure**, **compress**, filter analog signals in the real world
- often have **stringent real-time constraints**
---
<!-- .slide: data-background="white" -->
## example
- texas instruments dsp chip, [tms320 series](https://www.ti.com/lit/ug/spruh79c/spruh79c.pdf?ts=1736945981001)
- one of the most famous examples of dsp systems
<br>
<img src="./img/embedded_arch/TI_DSP.jpg" height="500" title="Texas Instruments DSP Chip">
---
## typical digital signal processing
- **repetitive mathematical operations**
- over a large number of samples
- in real-time
---
## typical digital signal processing
- **repetitive mathematical operations**
- over a large number of samples
- in real-time
<br>
<br>
### "**multiply-accumulate**" (mac) algorithm
Note:
Imagine you are reading a sensor that measures temperature every second. The signal is "noisy" (it jumps around erratically). To smooth it, you don't just look at the current number; you look at the average of the current number and the previous two numbers.
This requires two repetitive steps that are the heart of DSP:
Multiplication: Weighting the data points.
Accumulation: Adding them together.
---
### "**multiply-accumulate**" (mac) algorithm
```python [1-3|4-6|7-10|11-14]
signal = [10, 22, 10, 12]
weights = [0.5, 0.25, 0.25]
output = []
# This loop is the "repetitive" nature of DSP
for i in range(2, len(signal)):
# The MAC (Multiply-Accumulate) Operation
val = (signal[i] * weights[0]) + \