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Mikhail Moiseev edited this page May 19, 2026 · 22 revisions

Introduction

The SystemC Compiler (ICSC) translates synthesizable SystemC design to synthesizable SystemVerilog design.

ICSC supports SystemC synthesizable subset in method and thread processes and arbitrary C++ code in module constructors. The tool produces human-readable SystemVerilog for complex multi-module designs in tens of seconds. This tool is focused on improving productivity of design and verification engineers and leaves optimization work for an underlying logic synthesis tool. It performs design checks to detect non-synthesizable code and common coding mistakes. ICSC is based on Clang/LLVM 18.1.8 and includes SystemC 3.0.1.

ICSC generates SystemVerilog (IEEE 1800-2017) code. To convert SystemVerilog to Verilog (IEEE 1364-2005) there is SV2V tool which is compatible with ICSC.

Main features

The SystemC Compiler is focused on productivity of design engineers with multiple features and advantages:

  • C++11/14/17/20 support
  • SystemC synthesizable standard support
  • Arbitrary C++ at elaboration phase, including module constructors
  • Human-readable generated Verilog code
  • CMake based project, no pragmas or extra scripts required
  • Fast translation procedure, seconds to a few minutes

Common SystemC Library

Common SystemC Library consists of types, modules and functions which could be used in SystemC designs and testbench code. The main part of the library are SingleSource communication channels including Target/Initiator, FIFO, Register and others. The channels have functional interfaces similar to TLM 1.0. All the components are synthesizable with the SystemC Compiler.

Common SystemC Library has three parts:

AI support

Existing LLMs are quite proficient with the SystemC language and can generate, debug, and review synthesizable design code. SystemC design with Single Source library channels provides a higher level of abstraction compared to the conventional Verilog/VHDL-based methodology: fewer input/output ports and signals, smaller and clearer functional interfaces for channels, and lots of reusable modules and functions. All of this makes LLM application even more efficient.

To specify the SystemC Compiler and Single Source library semantics, rules, and restrictions, we use Agent Skills. The skills are based on several Basic documents, ICSC unit tests, designs and examples. We have applied the skills to multiple SystemC designs. There are two simple examples:

To use the skills in Copilot open the chat and type:

/systemc-tools Create SystemC code for ...

Getting started

The SystemC Compiler is based on Clang/LLVM frontend and can be installed at most Linux OS as well as Windows Subsystem for Linux (WSL). There is install.sh script that downloads and builds ICSC and the required dependencies at Ubuntu 24.04, Ubuntu 22.04, Ubuntu 20.04, SLES15, SLES12 and others.

Instructions how to build and run ISCS are given at Getting started.

Documentation and resources

The SystemC Compiler User guide.

Single Source library Training slides.

SystemC is C++ based language specified by IEEE 1666-2023.

SystemC is developed and supported by Accellera Systems Initiative.

The last available SystemC version 3.0.1 is available at SystemC Community Portal.

Publications

  • Single Source library for high-level modelling and hardware synthesis at DvCon Europe 2024 presentation, full paper
  • Intel Compiler for SystemC and SystemC common library at CHIPS tech summit 2022, presentation
  • Temporal assertions in SystemC at DvCon'2020 and SystemC evolution day'2020 presentation, full paper
  • SystemC-to-Verilog Compiler: a productivity-focused tool for hardware design in cycle-accurate SystemC at DvCon'2019: presentation, full paper

Contacts

Mikhail Moiseev mikhail.moiseev at intel.com

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