Part of #154.
Resolves map ticket 9 (first operator tier): FP32 MATMUL over the shared corpus case MATMUL_FP32, following ticket 8's IDENTITY.
- Kernel: checked-in SPIR-V
matmul_fp32_spirv — three storage buffers, spec constants M/N/K/batch, one thread per output element dispatched (n, m, batch). No fused multiply-add: separate OpFMul/OpFAdd so the shared oracle's tolerance holds under every float-controls mode.
- Admission: multi-operator graphs admitted when extra operators are
CONST zero-point producers; MATMUL requires the two trailing CONST inputs to serialize to zero (signed zero included), matching the OpenVINO/Hexagon/XDNA ZERO_ZERO_POINTS constraint.
- Native: shared set layout widened to three bindings; descriptor writes keyed by slot index; dispatch geometry and specialization data per kernel; descriptor pool sized for the widest layout.
- Portability: instance creation now requests
VK_KHR_portability_enumeration + ENUMERATE_PORTABILITY_KHR — MoltenVK refuses enumeration otherwise; no-op on conformant drivers.
- Evidence: on Apple M3 (MoltenVK), the shared FP32 MATMUL oracle matches in every advertised memory domain; the full backend hardware suite passes 13/13 with
VIRTIO_ACCEL_VULKAN_REQUIRE_DEVICE=1.
- spirv-val validated offline during development; module is structurally tested in-crate.
Part of #154.
Resolves map ticket 9 (first operator tier): FP32 MATMUL over the shared corpus case
MATMUL_FP32, following ticket 8's IDENTITY.matmul_fp32_spirv— three storage buffers, spec constants M/N/K/batch, one thread per output element dispatched (n, m, batch). No fused multiply-add: separate OpFMul/OpFAdd so the shared oracle's tolerance holds under every float-controls mode.CONSTzero-point producers; MATMUL requires the two trailing CONST inputs to serialize to zero (signed zero included), matching the OpenVINO/Hexagon/XDNA ZERO_ZERO_POINTS constraint.VK_KHR_portability_enumeration+ENUMERATE_PORTABILITY_KHR— MoltenVK refuses enumeration otherwise; no-op on conformant drivers.VIRTIO_ACCEL_VULKAN_REQUIRE_DEVICE=1.