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fix(amdsmi): Count clock-gated XCDs in xcd_counter API - #9686

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users/bkanango/PR-ROCM-28766
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fix(amdsmi): Count clock-gated XCDs in xcd_counter API#9686
bkanango wants to merge 2 commits into
developfrom
users/bkanango/PR-ROCM-28766

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@bkanango

@bkanango bkanango commented Aug 4, 2026

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Motivation

amdsmi_get_gpu_xcd_counter() returned 0 on idle GPUs (GFX clock gated at 0 MHz) instead of the actual XCD count.

Technical Details

Changed rsmi_dev_metrics_xcd_counter_get() to count entries until the UINT16_MAX sentinel rather than skipping zero-clock entries, making the API return a power-state-independent count as callers expect.

Issue Tracking

JIRA ID : ROCM-28766

Test Plan

amd-smi metric -c
amd-smi metric -u
Confirm the gated state — GFX clock 0 MHz, GFX activi
python3 -c "import amdsmi; amdsmi.amdsmi_init();
print(amdsmi.amdsmi_get_gpu_xcd_counter(amdsmi.amdsmi_get_processor_handles()[0]))"

Test Result

lsttdev1@lsttdev1:~$ python3 -c "import amdsmi; amdsmi.amdsmi_init(); \
print(amdsmi.amdsmi_get_gpu_xcd_counter(amdsmi.amdsmi_get_processor_handles()[0]))"
1
lsttdev1@lsttdev1:~$ amd-smi metric -u -c -g 0
GPU: 0
    USAGE:
        GFX_ACTIVITY: 0 %
        UMC_ACTIVITY: 0 %
        MM_ACTIVITY: 0 %
        VCN_ACTIVITY: [0 %, N/A, N/A, N/A]
        JPEG_ACTIVITY: [N/A, N/A, N/A, N/A, N/A, N/A, N/A, N/A, N/A, N/A, N/A, N/A, N/A, N/A, N/A, N/A, N/A, N/A, N/A, N/A, N/A, N/A, N/A, N/A, N/A, N/A, N/A, N/A, N/A, N/A, N/A, N/A]
        GFX_BUSY_INST: N/A
        JPEG_BUSY: N/A
        VCN_BUSY: 0 %
    CLOCK:
        GFX_0:
            CLK: 0 MHz
            MIN_CLK: 500 MHz
            MAX_CLK: 2500 MHz
            DEEP_SLEEP: ENABLED
        MEM_0:
            CLK: 96 MHz
            MIN_CLK: 100 MHz
            MAX_CLK: 200 MHz
            DEEP_SLEEP: ENABLED
        VCLK_0:
            CLK: 25 MHz
            MIN_CLK: 513 MHz
            MAX_CLK: 2934 MHz
            DEEP_SLEEP: ENABLED
        DCLK_0:
            CLK: 25 MHz
            MIN_CLK: 513 MHz
            MAX_CLK: 2200 MHz
            DEEP_SLEEP: ENABLED
        FCLK_0:
            CLK: 601 MHz
            MAX_CLK: 0 MHz
        SOCCLK_0:
            CLK: 500 MHz
            MIN_CLK: 500 MHz
            MAX_CLK: 1500 MHz
            DEEP_SLEEP: DISABLED

lsttdev1@lsttdev1:~$ python3 -c "import amdsmi; amdsmi.amdsmi_init(); \
print(amdsmi.amdsmi_get_gpu_xcd_counter(amdsmi.amdsmi_get_processor_handles()[0]))"
1

Submission Checklist

@bkanango
bkanango requested a review from a team August 4, 2026 23:37
@therock-pr-bot

therock-pr-bot Bot commented Aug 4, 2026

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✅ All Policy Checks Passed

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📝 PR Description ✅ Pass
Forbidden Files ✅ Pass
🧪 Unit Test ✅ Pass
🚫 Draft PR 🔜 To Be Enabled
🚩 Feature Flag 🔜 To Be Enabled
📊 Code Coverage 🔜 To Be Enabled

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@gabrpham gabrpham left a comment

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Looks good to me. Approved.

@bkanango
bkanango force-pushed the users/bkanango/PR-ROCM-28766 branch from bc9ad4b to e3859dc Compare August 10, 2026 17:08
amdsmi_get_gpu_xcd_counter() returned 0 on idle GPUs (GFX clock gated
at 0 MHz) instead of the actual XCD count. The counter now includes all
valid XCD entries regardless of their current clock state, fixing
instability on asics where the value would toggle between idle
and active on the same hardware.

Changed rsmi_dev_metrics_xcd_counter_get() to count entries until the
UINT16_MAX sentinel rather than skipping zero-clock entries, making the
API return a power-state-independent count as callers expect.

Signed-off-by: Bindhiya Kanangot Balakrishnan <Bindhiya.KanangotBalakrishnan@amd.com>
Add test case to verify amdsmi_get_gpu_xcd_counter() returns a stable
count across multiple calls, regardless of GPU idle/clock-gated state.
This prevents regression where zero-clock entries were incorrectly
skipped, causing the count to vary with power state.

The test verifies:
- XCD count remains consistent across consecutive API calls
- Count is non-zero on hardware with XCDs
- Current GFX clock state (including 0 MHz) doesn't affect the count

Signed-off-by: Bindhiya Kanangot Balakrishnan <Bindhiya.KanangotBalakrishnan@amd.com>
@bkanango
bkanango force-pushed the users/bkanango/PR-ROCM-28766 branch from e3859dc to ed0a978 Compare August 10, 2026 17:09
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3 participants