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1. 01-basic-logic-gates 01-basic-logic-gates Public

   This repository contains the Verilog HDL implementation, testbenches, and functional simulation waveforms for basic logic gates.

   Verilog 3

2. 02-combinational-circuits 02-combinational-circuits Public

   Combinational circuits in Verilog - Adders, Subtractor, MUX, Decoder, Encoder, Comparator and 16-bit ALU. Step 2 of 8 in a VLSI portfolio roadmap building to a 16-bit pipelined RISC processor.

   Verilog 3