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Merged
tgingold-cern merged 2 commits into from
May 19, 2026
Merged

fix vhdl-ohwr constants prefix from c_ to C_ #83

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0ad8c59
fix vhdl-ohwr constants prefix from c_ to C_
aranzaba May 6, 2026
94ee48a
update vhdl-ohwr testfiles
aranzaba May 6, 2026
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4 changes: 2 additions & 2 deletions proto/cheby/print_consts.py
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Expand Up @@ -243,10 +243,10 @@ def __init__(self, fd, root):
self.pkg_name = root.hdl_module_name + '_consts_pkg'

def pr_const(self, name, val):
super().pr_const("c_" + name, val)
super().pr_const("C_" + name, val)

def pr_const_width(self, name, val, width):
super().pr_const_width("c_" + name, val, width)
super().pr_const_width("C_" + name, val, width)

def pr_address(self, n):
# ADDR is a suffix.
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18 changes: 9 additions & 9 deletions testfiles/bug-const-range/const_range-consts.vhdl-ohwr
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Expand Up @@ -2,13 +2,13 @@ library ieee;
use ieee.std_logic_1164.all;

package const_range_consts_pkg is
constant c_CONST_RANGE_SIZE : Natural := 20;
constant c_CONST_RANGE_LARGE_VAL_0_ADDR : Natural := 16#0#;
constant c_CONST_RANGE_LARGE_VAL_0_PRESET : std_logic_vector(32-1 downto 0) := x"f38243bb";
constant c_CONST_RANGE_LARGE_VAL_1_ADDR : Natural := 16#4#;
constant c_CONST_RANGE_LARGE_VAL_1_PRESET : std_logic_vector(32-1 downto 0) := x"fffffff7";
constant c_CONST_RANGE_SUPER_LARGE_VAL_ADDR : Natural := 16#8#;
constant c_CONST_RANGE_SUPER_LARGE_VAL_PRESET : std_logic_vector(64-1 downto 0) := x"818734fa9b1e0cf4";
constant c_CONST_RANGE_SMALL_VAL_ADDR : Natural := 16#10#;
constant c_CONST_RANGE_SMALL_VAL_PRESET : std_logic_vector(32-1 downto 0) := x"00000001";
constant C_CONST_RANGE_SIZE : Natural := 20;
constant C_CONST_RANGE_LARGE_VAL_0_ADDR : Natural := 16#0#;
constant C_CONST_RANGE_LARGE_VAL_0_PRESET : std_logic_vector(32-1 downto 0) := x"f38243bb";
constant C_CONST_RANGE_LARGE_VAL_1_ADDR : Natural := 16#4#;
constant C_CONST_RANGE_LARGE_VAL_1_PRESET : std_logic_vector(32-1 downto 0) := x"fffffff7";
constant C_CONST_RANGE_SUPER_LARGE_VAL_ADDR : Natural := 16#8#;
constant C_CONST_RANGE_SUPER_LARGE_VAL_PRESET : std_logic_vector(64-1 downto 0) := x"818734fa9b1e0cf4";
constant C_CONST_RANGE_SMALL_VAL_ADDR : Natural := 16#10#;
constant C_CONST_RANGE_SMALL_VAL_PRESET : std_logic_vector(32-1 downto 0) := x"00000001";
end package const_range_consts_pkg;
4 changes: 2 additions & 2 deletions testfiles/bug-consts/blkpfx-consts.vhdl-ohwr
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Expand Up @@ -2,6 +2,6 @@ library ieee;
use ieee.std_logic_1164.all;

package blkpfx_consts_pkg is
constant c_BLKPFX_SIZE : Natural := 4;
constant c_BLKPFX_REG1_ADDR : Natural := 16#0#;
constant C_BLKPFX_SIZE : Natural := 4;
constant C_BLKPFX_REG1_ADDR : Natural := 16#0#;
end package blkpfx_consts_pkg;
26 changes: 13 additions & 13 deletions testfiles/bug-same-label/same_label-consts.vhdl-ohwr
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Expand Up @@ -2,17 +2,17 @@ library ieee;
use ieee.std_logic_1164.all;

package same_label_reg_consts_pkg is
constant c_SAME_LABEL_REG_SIZE : Natural := 16;
constant c_SAME_LABEL_REG_NO_FIELDS_ADDR : Natural := 16#0#;
constant c_SAME_LABEL_REG_NO_FIELDS_PRESET : std_logic_vector(8-1 downto 0) := x"20";
constant c_SAME_LABEL_REG_SAME_NAME_ADDR : Natural := 16#4#;
constant c_SAME_LABEL_REG_SAME_NAME_WIDTH : Natural := 1;
constant c_SAME_LABEL_REG_SAME_NAME_OFFSET : Natural := 0;
constant c_SAME_LABEL_REG_SAME_NAME_MULTI_ADDR : Natural := 16#8#;
constant c_SAME_LABEL_REG_SAME_NAME_MULTI_WIDTH : Natural := 12;
constant c_SAME_LABEL_REG_SAME_NAME_MULTI_OFFSET : Natural := 0;
constant c_SAME_LABEL_REG_NOT_SAME_REG_ADDR : Natural := 16#c#;
constant c_ADDR_SAME_LABEL_REG_NOT_SAME : Natural := 16#c#;
constant c_SAME_LABEL_REG_NOT_SAME_WIDTH : Natural := 1;
constant c_SAME_LABEL_REG_NOT_SAME_OFFSET : Natural := 0;
constant C_SAME_LABEL_REG_SIZE : Natural := 16;
constant C_SAME_LABEL_REG_NO_FIELDS_ADDR : Natural := 16#0#;
constant C_SAME_LABEL_REG_NO_FIELDS_PRESET : std_logic_vector(8-1 downto 0) := x"20";
constant C_SAME_LABEL_REG_SAME_NAME_ADDR : Natural := 16#4#;
constant C_SAME_LABEL_REG_SAME_NAME_WIDTH : Natural := 1;
constant C_SAME_LABEL_REG_SAME_NAME_OFFSET : Natural := 0;
constant C_SAME_LABEL_REG_SAME_NAME_MULTI_ADDR : Natural := 16#8#;
constant C_SAME_LABEL_REG_SAME_NAME_MULTI_WIDTH : Natural := 12;
constant C_SAME_LABEL_REG_SAME_NAME_MULTI_OFFSET : Natural := 0;
constant C_SAME_LABEL_REG_NOT_SAME_REG_ADDR : Natural := 16#c#;
constant C_ADDR_SAME_LABEL_REG_NOT_SAME : Natural := 16#c#;
constant C_SAME_LABEL_REG_NOT_SAME_WIDTH : Natural := 1;
constant C_SAME_LABEL_REG_NOT_SAME_OFFSET : Natural := 0;
end package same_label_reg_consts_pkg;
126 changes: 63 additions & 63 deletions testfiles/demo_all-consts.vhdl-ohwr
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Expand Up @@ -2,67 +2,67 @@ library ieee;
use ieee.std_logic_1164.all;

package demo_all_consts_pkg is
constant c_DEMO_ALL_SIZE : Natural := 8448;
constant c_DEMO_ALL_REG0_ADDR : Natural := 16#0#;
constant c_ADDR_DEMO_ALL_REG0_FIELD00 : Natural := 16#0#;
constant c_DEMO_ALL_REG0_FIELD00_WIDTH : Natural := 1;
constant c_DEMO_ALL_REG0_FIELD00_OFFSET : Natural := 1;
constant c_ADDR_DEMO_ALL_REG0_FIELD01 : Natural := 16#0#;
constant c_DEMO_ALL_REG0_FIELD01_WIDTH : Natural := 4;
constant c_DEMO_ALL_REG0_FIELD01_OFFSET : Natural := 4;
constant c_ADDR_DEMO_ALL_REG0_FIELD02 : Natural := 16#0#;
constant c_DEMO_ALL_REG0_FIELD02_WIDTH : Natural := 3;
constant c_DEMO_ALL_REG0_FIELD02_OFFSET : Natural := 8;
constant c_DEMO_ALL_REG0_FIELD02_PRESET : std_logic_vector(3-1 downto 0) := "010";
constant c_DEMO_ALL_REG1_ADDR : Natural := 16#4#;
constant c_DEMO_ALL_REG1_PRESET : std_logic_vector(32-1 downto 0) := x"00000123";
constant c_DEMO_ALL_REG2_ADDR : Natural := 16#8#;
constant c_ADDR_DEMO_ALL_REG2_FIELD10 : Natural := 16#8#;
constant c_DEMO_ALL_REG2_FIELD10_WIDTH : Natural := 16;
constant c_DEMO_ALL_REG2_FIELD10_OFFSET : Natural := 0;
constant c_ADDR_DEMO_ALL_REG2_FIELD11 : Natural := 16#8#;
constant c_DEMO_ALL_REG2_FIELD11_WIDTH : Natural := 40;
constant c_DEMO_ALL_REG2_FIELD11_OFFSET : Natural := 16;
constant c_DEMO_ALL_BLOCK1_ADDR : Natural := 16#10#;
constant c_ADDR_MASK_DEMO_ALL_BLOCK1 : Natural := 16#3ff0#;
constant c_ADDR_FMASK_DEMO_ALL_BLOCK1 : Natural := 16#3ff0#;
constant c_DEMO_ALL_BLOCK1_SIZE : Natural := 16;
constant c_DEMO_ALL_BLOCK1_B1REG0_ADDR : Natural := 16#10#;
constant c_DEMO_ALL_BLOCK1_B1REG1_ADDR : Natural := 16#14#;
constant c_ADDR_DEMO_ALL_BLOCK1_B1REG1_F0 : Natural := 16#14#;
constant c_DEMO_ALL_BLOCK1_B1REG1_F0_WIDTH : Natural := 1;
constant c_DEMO_ALL_BLOCK1_B1REG1_F0_OFFSET : Natural := 0;
constant c_ADDR_DEMO_ALL_BLOCK1_B1REG1_F1 : Natural := 16#14#;
constant c_DEMO_ALL_BLOCK1_B1REG1_F1_WIDTH : Natural := 31;
constant c_DEMO_ALL_BLOCK1_B1REG1_F1_OFFSET : Natural := 1;
constant c_DEMO_ALL_BLOCK1_B1REG2_ADDR : Natural := 16#18#;
constant c_DEMO_ALL_SUB1_ADDR : Natural := 16#20#;
constant c_ADDR_MASK_DEMO_ALL_SUB1 : Natural := 16#3ff0#;
constant c_ADDR_FMASK_DEMO_ALL_SUB1 : Natural := 16#3ff0#;
constant c_DEMO_ALL_SUB1_SIZE : Natural := 16;
constant c_DEMO_ALL_SUB2_ADDR : Natural := 16#30#;
constant c_ADDR_MASK_DEMO_ALL_SUB2 : Natural := 16#3ff0#;
constant c_ADDR_FMASK_DEMO_ALL_SUB2 : Natural := 16#3ff0#;
constant c_DEMO_ALL_SUB2_SIZE : Natural := 16;
constant c_DEMO_ALL_SUB3_ADDR : Natural := 16#1000#;
constant c_ADDR_MASK_DEMO_ALL_SUB3 : Natural := 16#3000#;
constant c_ADDR_FMASK_DEMO_ALL_SUB3 : Natural := 16#3000#;
constant c_DEMO_ALL_SUB3_SIZE : Natural := 4096;
constant c_DEMO_ALL_ARR1_ADDR : Natural := 16#2000#;
constant c_ADDR_MASK_DEMO_ALL_ARR1 : Natural := 16#3ff8#;
constant c_ADDR_FMASK_DEMO_ALL_ARR1 : Natural := 16#3ff8#;
constant c_DEMO_ALL_ARR1_SIZE : Natural := 8;
constant c_DEMO_ALL_ARR1_0_ADDR : Natural := 16#2000#;
constant c_ADDR_MASK_DEMO_ALL_ARR1_0 : Natural := 16#4#;
constant c_ADDR_FMASK_DEMO_ALL_ARR1_0 : Natural := 16#3ffc#;
constant c_DEMO_ALL_ARR1_0_SIZE : Natural := 4;
constant c_DEMO_ALL_ARR1_0_AREG1_ADDR : Natural := 16#2000#;
constant c_DEMO_ALL_ARR1_1_ADDR : Natural := 16#2004#;
constant c_ADDR_MASK_DEMO_ALL_ARR1_1 : Natural := 16#4#;
constant c_ADDR_FMASK_DEMO_ALL_ARR1_1 : Natural := 16#3ffc#;
constant c_DEMO_ALL_ARR1_1_SIZE : Natural := 4;
constant c_DEMO_ALL_ARR1_1_AREG1_ADDR : Natural := 16#2004#;
constant c_DEMO_ALL_RAM_RO1_ADDR : Natural := 16#2080#;
constant c_DEMO_ALL_RAM_RO1_SIZE : Natural := 4;
constant c_DEMO_ALL_RAM_RO1_VALUE_ADDR : Natural := 16#0#;
constant C_DEMO_ALL_SIZE : Natural := 8448;
constant C_DEMO_ALL_REG0_ADDR : Natural := 16#0#;
constant C_ADDR_DEMO_ALL_REG0_FIELD00 : Natural := 16#0#;
constant C_DEMO_ALL_REG0_FIELD00_WIDTH : Natural := 1;
constant C_DEMO_ALL_REG0_FIELD00_OFFSET : Natural := 1;
constant C_ADDR_DEMO_ALL_REG0_FIELD01 : Natural := 16#0#;
constant C_DEMO_ALL_REG0_FIELD01_WIDTH : Natural := 4;
constant C_DEMO_ALL_REG0_FIELD01_OFFSET : Natural := 4;
constant C_ADDR_DEMO_ALL_REG0_FIELD02 : Natural := 16#0#;
constant C_DEMO_ALL_REG0_FIELD02_WIDTH : Natural := 3;
constant C_DEMO_ALL_REG0_FIELD02_OFFSET : Natural := 8;
constant C_DEMO_ALL_REG0_FIELD02_PRESET : std_logic_vector(3-1 downto 0) := "010";
constant C_DEMO_ALL_REG1_ADDR : Natural := 16#4#;
constant C_DEMO_ALL_REG1_PRESET : std_logic_vector(32-1 downto 0) := x"00000123";
constant C_DEMO_ALL_REG2_ADDR : Natural := 16#8#;
constant C_ADDR_DEMO_ALL_REG2_FIELD10 : Natural := 16#8#;
constant C_DEMO_ALL_REG2_FIELD10_WIDTH : Natural := 16;
constant C_DEMO_ALL_REG2_FIELD10_OFFSET : Natural := 0;
constant C_ADDR_DEMO_ALL_REG2_FIELD11 : Natural := 16#8#;
constant C_DEMO_ALL_REG2_FIELD11_WIDTH : Natural := 40;
constant C_DEMO_ALL_REG2_FIELD11_OFFSET : Natural := 16;
constant C_DEMO_ALL_BLOCK1_ADDR : Natural := 16#10#;
constant C_ADDR_MASK_DEMO_ALL_BLOCK1 : Natural := 16#3ff0#;
constant C_ADDR_FMASK_DEMO_ALL_BLOCK1 : Natural := 16#3ff0#;
constant C_DEMO_ALL_BLOCK1_SIZE : Natural := 16;
constant C_DEMO_ALL_BLOCK1_B1REG0_ADDR : Natural := 16#10#;
constant C_DEMO_ALL_BLOCK1_B1REG1_ADDR : Natural := 16#14#;
constant C_ADDR_DEMO_ALL_BLOCK1_B1REG1_F0 : Natural := 16#14#;
constant C_DEMO_ALL_BLOCK1_B1REG1_F0_WIDTH : Natural := 1;
constant C_DEMO_ALL_BLOCK1_B1REG1_F0_OFFSET : Natural := 0;
constant C_ADDR_DEMO_ALL_BLOCK1_B1REG1_F1 : Natural := 16#14#;
constant C_DEMO_ALL_BLOCK1_B1REG1_F1_WIDTH : Natural := 31;
constant C_DEMO_ALL_BLOCK1_B1REG1_F1_OFFSET : Natural := 1;
constant C_DEMO_ALL_BLOCK1_B1REG2_ADDR : Natural := 16#18#;
constant C_DEMO_ALL_SUB1_ADDR : Natural := 16#20#;
constant C_ADDR_MASK_DEMO_ALL_SUB1 : Natural := 16#3ff0#;
constant C_ADDR_FMASK_DEMO_ALL_SUB1 : Natural := 16#3ff0#;
constant C_DEMO_ALL_SUB1_SIZE : Natural := 16;
constant C_DEMO_ALL_SUB2_ADDR : Natural := 16#30#;
constant C_ADDR_MASK_DEMO_ALL_SUB2 : Natural := 16#3ff0#;
constant C_ADDR_FMASK_DEMO_ALL_SUB2 : Natural := 16#3ff0#;
constant C_DEMO_ALL_SUB2_SIZE : Natural := 16;
constant C_DEMO_ALL_SUB3_ADDR : Natural := 16#1000#;
constant C_ADDR_MASK_DEMO_ALL_SUB3 : Natural := 16#3000#;
constant C_ADDR_FMASK_DEMO_ALL_SUB3 : Natural := 16#3000#;
constant C_DEMO_ALL_SUB3_SIZE : Natural := 4096;
constant C_DEMO_ALL_ARR1_ADDR : Natural := 16#2000#;
constant C_ADDR_MASK_DEMO_ALL_ARR1 : Natural := 16#3ff8#;
constant C_ADDR_FMASK_DEMO_ALL_ARR1 : Natural := 16#3ff8#;
constant C_DEMO_ALL_ARR1_SIZE : Natural := 8;
constant C_DEMO_ALL_ARR1_0_ADDR : Natural := 16#2000#;
constant C_ADDR_MASK_DEMO_ALL_ARR1_0 : Natural := 16#4#;
constant C_ADDR_FMASK_DEMO_ALL_ARR1_0 : Natural := 16#3ffc#;
constant C_DEMO_ALL_ARR1_0_SIZE : Natural := 4;
constant C_DEMO_ALL_ARR1_0_AREG1_ADDR : Natural := 16#2000#;
constant C_DEMO_ALL_ARR1_1_ADDR : Natural := 16#2004#;
constant C_ADDR_MASK_DEMO_ALL_ARR1_1 : Natural := 16#4#;
constant C_ADDR_FMASK_DEMO_ALL_ARR1_1 : Natural := 16#3ffc#;
constant C_DEMO_ALL_ARR1_1_SIZE : Natural := 4;
constant C_DEMO_ALL_ARR1_1_AREG1_ADDR : Natural := 16#2004#;
constant C_DEMO_ALL_RAM_RO1_ADDR : Natural := 16#2080#;
constant C_DEMO_ALL_RAM_RO1_SIZE : Natural := 4;
constant C_DEMO_ALL_RAM_RO1_VALUE_ADDR : Natural := 16#0#;
end package demo_all_consts_pkg;
4 changes: 2 additions & 2 deletions testfiles/features/enums1-consts.vhdl-ohwr
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Expand Up @@ -2,8 +2,8 @@ library ieee;
use ieee.std_logic_1164.all;

package enums1_consts_pkg is
constant c_ENUMS1_SIZE : Natural := 4;
constant c_ENUMS1_R1_ADDR : Natural := 16#0#;
constant C_ENUMS1_SIZE : Natural := 4;
constant C_ENUMS1_R1_ADDR : Natural := 16#0#;
constant C_enum1_hello : std_logic_vector (7 downto 0) := "00000000";
constant C_enum1_World : std_logic_vector (7 downto 0) := "00000001";
constant C_enum2_hello : std_logic_vector (0 downto 0) := "0";
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10 changes: 5 additions & 5 deletions testfiles/features/enums2-consts.vhdl-ohwr
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Expand Up @@ -2,11 +2,11 @@ library ieee;
use ieee.std_logic_1164.all;

package enums2_consts_pkg is
constant c_ENUMS2_SIZE : Natural := 4;
constant c_ENUMS2_R1_ADDR : Natural := 16#0#;
constant c_ADDR_ENUMS2_R1_F1 : Natural := 16#0#;
constant c_ENUMS2_R1_F1_WIDTH : Natural := 8;
constant c_ENUMS2_R1_F1_OFFSET : Natural := 0;
constant C_ENUMS2_SIZE : Natural := 4;
constant C_ENUMS2_R1_ADDR : Natural := 16#0#;
constant C_ADDR_ENUMS2_R1_F1 : Natural := 16#0#;
constant C_ENUMS2_R1_F1_WIDTH : Natural := 8;
constant C_ENUMS2_R1_F1_OFFSET : Natural := 0;
constant C_enum1_hello : std_logic_vector (7 downto 0) := "00000000";
constant C_enum1_World : std_logic_vector (7 downto 0) := "00000001";
constant C_enum2_hello : std_logic_vector (0 downto 0) := "0";
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8 changes: 4 additions & 4 deletions testfiles/features/mapinfo1-consts.vhdl-ohwr
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Expand Up @@ -2,8 +2,8 @@ library ieee;
use ieee.std_logic_1164.all;

package semver1_consts_pkg is
constant c_SEMVER1_SIZE : Natural := 4;
constant c_SEMVER1_MEMMAP_VERSION : Natural := 16#10000#;
constant c_SEMVER1_IDENT : Natural := 16#12345678#;
constant c_SEMVER1_R1_ADDR : Natural := 16#0#;
constant C_SEMVER1_SIZE : Natural := 4;
constant C_SEMVER1_MEMMAP_VERSION : Natural := 16#10000#;
constant C_SEMVER1_IDENT : Natural := 16#12345678#;
constant C_SEMVER1_R1_ADDR : Natural := 16#0#;
end package semver1_consts_pkg;
20 changes: 10 additions & 10 deletions testfiles/features/memwide_ua-consts.vhdl-ohwr
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Expand Up @@ -2,14 +2,14 @@ library ieee;
use ieee.std_logic_1164.all;

package memwide_ua_consts_pkg is
constant c_MEMWIDE_UA_SIZE : Natural := 256;
constant c_MEMWIDE_UA_REGA_ADDR : Natural := 16#0#;
constant c_ADDR_MEMWIDE_UA_REGA_FIELD0 : Natural := 16#0#;
constant c_MEMWIDE_UA_REGA_FIELD0_WIDTH : Natural := 1;
constant c_MEMWIDE_UA_REGA_FIELD0_OFFSET : Natural := 1;
constant c_MEMWIDE_UA_TS_ADDR : Natural := 16#80#;
constant c_MEMWIDE_UA_TS_SIZE : Natural := 16;
constant c_MEMWIDE_UA_TS_RISE_SEC_ADDR : Natural := 16#0#;
constant c_MEMWIDE_UA_TS_RISE_NS_ADDR : Natural := 16#4#;
constant c_MEMWIDE_UA_TS_FALL_SEC_ADDR : Natural := 16#8#;
constant C_MEMWIDE_UA_SIZE : Natural := 256;
constant C_MEMWIDE_UA_REGA_ADDR : Natural := 16#0#;
constant C_ADDR_MEMWIDE_UA_REGA_FIELD0 : Natural := 16#0#;
constant C_MEMWIDE_UA_REGA_FIELD0_WIDTH : Natural := 1;
constant C_MEMWIDE_UA_REGA_FIELD0_OFFSET : Natural := 1;
constant C_MEMWIDE_UA_TS_ADDR : Natural := 16#80#;
constant C_MEMWIDE_UA_TS_SIZE : Natural := 16;
constant C_MEMWIDE_UA_TS_RISE_SEC_ADDR : Natural := 16#0#;
constant C_MEMWIDE_UA_TS_RISE_NS_ADDR : Natural := 16#4#;
constant C_MEMWIDE_UA_TS_FALL_SEC_ADDR : Natural := 16#8#;
end package memwide_ua_consts_pkg;
6 changes: 3 additions & 3 deletions testfiles/features/semver1-consts.vhdl-ohwr
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Expand Up @@ -2,7 +2,7 @@ library ieee;
use ieee.std_logic_1164.all;

package semver1_consts_pkg is
constant c_SEMVER1_SIZE : Natural := 4;
constant c_SEMVER1_VERSION : Natural := 16#10000#;
constant c_SEMVER1_R1_ADDR : Natural := 16#0#;
constant C_SEMVER1_SIZE : Natural := 4;
constant C_SEMVER1_VERSION : Natural := 16#10000#;
constant C_SEMVER1_R1_ADDR : Natural := 16#0#;
end package semver1_consts_pkg;
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